1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor apparatus in which a fine pattern is formed, and more particularly a method of manufacturing a semiconductor apparatus in which a step of forming a gate electrode of an HEMT (High Electron Mobility Transistor) is improved.
2. Description of the Related Art
In general, in a GaAs device, in particular, an HEMT, in which a transistor is formed on a GaAs substrate, there is a demand that a wide recess structure wherein a recess width is increased to enhance a Schottky reverse breakdown voltage be employed and that the gate length be decreased to reduce a noise factor (NF). In the prior art, to meet the demand, a fine resist pattern having an invertedly tapered cross section is formed such that a first electron beam exposure is performed in patterning a resist which will serve as an etching mask for etching a recess, and then a second electron beam exposure is performed in patterning a resist which will serve as an etching mask for forming a gate electrode.
The two-step electron beam exposure requires several hours, and a so-called "through-put" which indicates the efficiency of processing wafers in a unit time is degraded. In addition, owing to an alignment error due to the two-step electron beam exposure, the alignment between the recess and gate electrode cannot exactly be controlled. These drawbacks are found both in the case of forming a straight-type gate electrode of HEMT and in the case of forming a T-type gate electrode.
Referring to FIGS. 1 to 6 and FIGS. 7 to 16, examples of a two-step electron beam exposure in steps of forming straight-type and T-type gate electrodes of a conventional HEMT will now be described.
FIGS. 1 to 6 are cross-sectional views showing the steps of manufacturing a conventional HEMT in the case of forming a straight-type gate electrode.
As is shown in FIG. 1, a buffer epitaxial layer 41 is formed on the surface of a GaAs substrate 40. A secondary electron supply epitaxial layer 42 is formed on the buffer epitaxial layer 41. A cap epitaxial layer 43 is formed on the secondary electron supply epitaxial layer 42. A positive-type first electron beam resist 44 is coated on the cap epitaxial layer 43, and the resultant structure is subjected to baking treatment.
The resist 44 is subjected to first electron beam exposure in order to form a pattern which will serve as an etching mask for a recess etching step. An exposed region of the resist 44 is denoted by numeral 44a.
Subsequently, development, washing and drying (so-called "step (multi) development treatment") is performed at least once. Thus, as shown in FIG. 2, an opening 45 having an invertedly tapered cross section is formed in the resist 44. Then, recess etching is performed to form a groove 46 in a surface portion of the resultant structure.
After the resist 44 is removed, a second electron beam resist 47 for lift-off is coated and baked, as shown in FIG. 3.
A second electron beam exposure step is performed on the resist 47 to form a pattern which will serve as an etching mask for forming a gate electrode. An exposed region of the resist 47 is denoted by numeral 47a.
Subsequently, development, washing and drying is performed, as shown in FIG. 4, to form an opening 48 having an invertedly tapered cross section in the resist 47.
Then, as shown in FIG. 5, a metal wiring layer 49 for forming a gate electrode is deposited on the entire surface of the substrate.
As shown in FIG. 6, a portion (which will become a gate electrode G of the HEMT) of the metal wiring layer 49, which is deposited on the bottom of the opening 48, is left, and the second electron resist 47 and the unnecessary metal wiring layer 49 on the resist 47 are removed by a lift-off method.
Symbols S and D denote a source region and a drain region of an HEMT formed by an ordinary process.
FIGS. 7 to 16 are cross-sectional views showing the steps of manufacturing a conventional HEMT device for forming a T-type gate electrode.
As is shown in FIG. 7, a positive-type first electron beam resist 54 is coated on a GaAs substrate 50 and baked, and an electron beam exposure step, as shown in FIG. 1, is performed on the resist 54.
FIG. 8 shows a step in which the resist which was subjected to the electron beam exposure is developed and a very small opening 55 is formed in part of the resist.
Recess etching is performed by putting a phosphate liquid in the opening 55, as shown in FIG. 9, thereby forming a groove 56 in a surface portion of the substrate.
Subsequently, as shown in FIG. 10, a first metal wiring layer 59a, having a relatively high melting point, for forming a lower part of a T-type gate electrode is deposited on the entire surface of the substrate. A novolak-based positive-type second electron beam resist 57 is coated on the first metal wiring layer 59a and baked.
A second electron beam exposure is performed on the second resist 57, as shown in FIG. 11.
The second electron beam resist 57 which was subjected to the second electron beam exposure is developed and a relatively large opening 58 having an invertedly tapered cross section is formed in part of the resist.
A second metal wiring layer 59b for forming a gate electrode is deposited on the entire surface of the resultant structure, as shown in FIG. 13.
As is shown in FIG. 14, a portion (which will become a gate electrode G of the HEMT) of the second metal wiring layer 59b, which is deposited on the bottom of the opening 58, is left, and the second electron resist 57 and the unnecessary metal wiring layer 59 on the resist 57 are removed by a lift-off method.
Subsequently, as is shown in FIG. 15, the exposed portion of the first metal wiring layer 59a is etched away by a dry etching method (e.g. RIE (Reactive Ion Etching)), and the first resist 54 is lifted off, as shown in FIG. 16.
When the aforementioned resist pattern, which will become the etching mask for forming the T-type gate electrode of the HEMT, is formed, the two-step electron beam exposure is performed to form the very small opening 55 in the first electron beam resist 54 for forming the lower part of the T-gate electrode and to form the relatively large opening in the second electron beam resist 57 for forming the upper part of the T-gate electrode. Thus, the through-put is deteriorated.
Further, when the pattern (upper resist pattern) of the second electron beam resist 57 for forming the upper part of the T-gate electrode is formed, it must be aligned with the pattern (lower resist pattern) of the first electron beam resist 54 for the lower part of the T-gate electrode. Depending on the precision of alignment of patterns, a displacement may occur between the upper part and lower part of the T-gate electrode.
After the formation of the pattern of the lower resist 54 is completed, it is necessary to interpose a stopper layer 59a between the two resist layers to protect the lower resist pattern against the electron beam for forming the pattern of the upper resist 57. As a result, it becomes necessary to provide an out-gassing countermeasure to a gas occurring from the lower resist 54. Thus, the manufacturing process becomes more complex.
As regards either the straight-type gate electrode or T-gate electrode of the conventional HEMT, the two-step electron beam exposure must be performed in the recess etching step and the gate electrode forming step in the resist-patterning process. Thus, the through-put is degraded and the positional displacement between the recess groove and gate electrode occurs.